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[VHDL-FPGA-Verilog] Zet-1.3.1

Description: 在单片FPGA上实现九十年代初期PC，可安装Windows3.1及其他DOS系统。SOC中包含以80286(cpu),中断控制器,显示控制器(VGA),声音控制器,PS2(鼠标，键盘)等。是了解计算机历史变迁及学习SOC设计的重要资料！(ZET aims to implement an early 90`s PC on FPGA.Which include a 80286(cpu),interrupt controller,display card(VGA),sound card,PS2 interface .)
Platform: | Size: 2487296 | Author: VectorIII | Hits:

[VHDL-FPGA-Verilog] CCD_Array

Description: Interface TCD1209DG with Altera FPGA and transfer image data to PC via USB using USB FX2 Slave FIFO mode, Only FPGA code included.
Platform: | Size: 3320832 | Author: muralidh | Hits:

[Other] uart_2_pc

Description: 实现FPGA和PC通过串口传输数据，已经通过验证，可以结合自己的设计直接拿来用(ealize FPGA and PC to transmit data through serial port)
Platform: | Size: 1024 | Author: 紫木檀香雪 | Hits:

[VHDL-FPGA-Verilog] RS232

Description: 应用RS232实现PC端与FPGA的双向通信，可以实现收发数据的功能。(Bidirectional communication between PC and FPGA)
Platform: | Size: 461824 | Author: 柯里昂 | Hits:

[VHDL-FPGA-Verilog] _uart_test2

Description: data transmitted from FPGA to PC using COM PORT version 2
Platform: | Size: 8192 | Author: anh92 | Hits:

[VHDL-FPGA-Verilog] at7_ex05

Description: 实现PC端通过UART发送数据到FPGA，FPGA将所接收到的数据同样是通过UART原本不动的发回给PC端。(The PC terminal sends data to FPGA through UART. FPGA sends the received data back to the PC end by UART.)
Platform: | Size: 753664 | Author: 24fh | Hits:

[VHDL-FPGA-Verilog] uart

Description: RS232通信程序，用于实现PC端与FPGA之间实现串口通信(RS232 communication program for realizing serial port communication between PC and FPGA)
Platform: | Size: 137216 | Author: .00 | Hits:

[Com Port] 12345 keyuart

Description: verilog实现uart串口编程 FPGA板与PC传输数据(verilog uart processing FPGA and PC communication)
Platform: | Size: 6504448 | Author: `m | Hits:

[VHDL-FPGA-Verilog] chuankou

Description: UART loopback测试实例，接收PC端发送的UART数据，原数据返回给PC端，即loopback功能 可用FPGA开发板验证(The UART loopback test example receives the UART data sent by the PC terminal, and the original data is returned to the PC terminal, that is, the loopback function.)
Platform: | Size: 3581952 | Author: 小猪仔521 | Hits:
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